Cadence Design Systems, Inc.

Senior Principal Systems Engineer SERDES IP R&D (BB-E6173)

Encontrado en: Neuvoo CR


At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This is a unique opportunity to join the rapidly growing team in the SerDes IP R&D Group at Cadence Design Systems. We are looking for a Principal Systems Engineer who will be a key contributor to our advanced high speed SerDes IP products, supporting customer integration of SerDes IP into Soc designs. This is a hands-on customer facing technical position.

Main Job Tasks and Responsibilities:

  • Work with IP customers to review deliverables and physical integration requirements
  • Generate technical specification, data sheets, and application notes
  • Support customer package/board design and debug as necessary
  • Develop and provide guidelines regarding signal integrity and power integrity to customer
  • Provide integration training and recommendation to customers
  • Conduct integration reviews on customers’ major SoC milestones
  • Develop infrastructure to ensure robust IP development and testing
  • Provide feedback to R&D team from customers for IP improvement
  • Key contributor to R&D team to define and develop high speed SerDes IP product specifications
  • Position Requirements:

  • M.S. Electrical/Computer Engineering (or similar degree)
  • Must have at least 7 years of relevant experience working with high-speed SerDes and PHYs
  • Good understanding of high speed SerDes architecture
  • Familiarity with SOC IP integration design flows
  • Knowledge and experience in with front-end tools such as Digital and Analog simulation, waveform viewers, synthesis, static timing analysis, UPF, version control
  • Familiarity with verification methodologies
  • Experience with Verilog modeling and model validation
  • Experience writing Verilog, SystemVerilog, hardware description languages
  • Good understanding of DFT requirements for SOCs
  • Experience using system simulation tools, Matlab, Perl, or other scripting tools
  • Familiarity with advanced technology nodes (7nm and below) is a plus
  • Strong debug and problem-solving skills
  • Ability to analyze and resolve IP integration issues related to RTL, physical, or CAD tools
  • Excellent written and verbal communication skills
  • Must have strong group presentation skills
  • We’re doing work that matters. Help us solve what others can’t.

    calendar_todayhace 1 día

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    info Full time

    location_onSan José, Costa Rica

    work Cadence Design Systems, Inc.

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