Principal Application Engineer (BB-91B33)
Encontrado en: Neuvoo CR
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence place and route tool knowledge (Physical Synthesis, PnR, CTS, Static Timing Analysis) and experience are required.
Design experience should include ASIC design using industry-standard hardware description languages (Verilog/SystemVerilog)
Must have excellent debugging skills and an ability to separate out the critical issues from trivial ones.
CAD flow develop/debug/optimize
The candidate will possess a self-starter mindset with an established track record of complex problem solving in SOC physical design.
The candidate should possess excellent communication skills and be adept at working with both customer engineers/mgmt. as well as Cadence team members
MS or BS Computer/Electrical Engineering with 10-15 years experience
We’re doing work that matters. Help us solve what others can’t.
calendar_todayhace 10 horas
location_onSan José, Costa Rica
work Cadence Design Systems, Inc.